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may 2012 ? 2012 fairchild semiconductor corporation www.fairchildsemi.com FLS3217 / fls3247 ? rev. 1.0.0 FLS3217 / fls3247 ? single-stage pfc primary-side-regulation offline led dr iver with integrated power mosfet FLS3217 / fls3247 single-stage pfc primary-side-regulation offline led driver with integrated power mosfet features ? cost-effective solution without input bulk capacitor and feedback circuitry ? power-factor correction (pfc) ? integrated power mosfet ? accurate constant-current (cc) control independent online voltage, output voltage, and magnetizing inductance variation ? linear frequency control for increased efficiency ? open / short-led protection ? cycle-by-cycle current limiting ? over-temperature protection with auto restart ? low startup current: 20 a ? low operating current: 5ma ? v dd over-voltage protection (ovp) ? v dd under-voltage lockout (uvlo) ? application voltage range: 80v ac ~ 308v ac applications ? led lighting system description this highly integrated pwm controller with power mosfet, FLS3217 / fls3247, provides several features to enhance the performance of low-power flyback converters. the proprietary topology enables simplified circuit design for led lighting applications. by using the single-stage topology with primary-side regulation, an led lighting board can be implemented with the few external components and minimized cost; requiring no input bulk capacitor or feedback circuitry. to implement good power fact or and low thd, constant on-time control is utilized with an external capacitor connected to comi. precise constant-current control regulates accurate output current versus changes in input voltage and output voltage. the operating frequency is proportionally changed by the output voltage to guarantee dcm operation with higher efficiency and simple design. FLS3217 and fls3247 provide protection features such as open-led, short-led, and over-temperature protection. the current-limit level is automatically reduced to minimize the out put current and protect external components in short-led condition. ordering information part number operating temperature range package packing method FLS3217m -40c to +125c 7-lead, small outline package (soic) tape & reel FLS3217n 7-lead, small outline package (dip) tube fls3247n .
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FLS3217 / fls3247 ? rev. 1.0.0 2 FLS3217 / fls3247 ? single-stage pfc primary-side-regulation offline led driver with integrated power mosfet application diagram trans bridge diode fuse line input vdd comi gnd drain nc cs 2 5 3 7 6 1 vs 4 figure 1. typical application internal block diagram s r q 2 internal bias 5 vdd comi osc truecurrent? calculation leb gate driver 7 drain 1 cs v ref 4 vs 6 nc + - - + 3 gnd sawtooth generator v ocp s r q - + v ovp v dd good v dd good tsd shutdown dcm frequency controller vs freq. error amp. t dis detector ocp level controller vs - + - + auto restart protection: ovp (over-voltage protection) uvlo (under-voltage lockout) otp (over-temperature protection) sample & hold max. duty controller figure 2. functional block diagram
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FLS3217 / fls3247 ? rev. 1.0.0 3 FLS3217 / fls3247 ? single-stage pfc primary-side-regulation offline led driver with integrated power mosfet marking information zxytt tm s3217 zxytt tm s3247 figure 3. top mark pin configuration figure 4. pin configuration pin definitions pin # name description 1 cs current sense . this pin connects a current-sense resist or to detect the mosfet current for the output-current regulation in c onstant-current (cc) regulation. 2 vdd power supply . ic operating current and mosfet drivi ng current are supplied using this pin. 3 gnd ground 4 vs voltage sense . this pin detects the output voltage information and discharge time for maximum frequency control and constant current regulation. this pin is connected to an auxiliary winding of the transforme r via resistors of the divider. 5 comi constant current loop compensation . this pin is connected to a capacitor between the comi and gnd pins for compensation current loop gain. 6 nc no connect 7 drain power mosfet drain. this pin is the high-voltage power mosfet drain. f : fairchild logo z: plant code x: 1-digit year code y: 1-digit week code tt: 2-digit die run code t: package type (m=soic, n=dip) m: manufacture flow code
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FLS3217 / fls3247 ? rev. 1.0.0 4 FLS3217 / fls3247 ? single-stage pfc primary-side-regulation offline led driver with integrated power mosfet absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be operable above the recommended operating conditions and stressi ng the parts to these levels is not recommended. in addition, extended exposure to stresses above the recomm ended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. symbol parameter min. max. unit v vdd dc supply voltage (1,2) 30 v v vs vs pin input voltage -0.3 7.0 v v cs cs pin input voltage -0.3 7.0 v v comi comi pin input voltage -0.3 7.0 v i d continuous drain current t a =25c, FLS3217m/n 1 a t a =25c, fls3247n 4 i dm pulsed drain current FLS3217m/n 4 a fls3247n 16 i ar avalanche current FLS3217m/n - 1 a fls3247n 4 p d power dissipation soic, t a 50c 660 mw dip, t a 50c 1 w ? ja thermal resistance (junction-to-air) soic, t a 50c 150 c/w dip, t a 50c 95 ? jc thermal resistance (junction-to-case) soic, t a 50c 40 c/w dip, t a 50c 25 t j maximum junction temperature +150 c t stg storage temperature range -55 +150 c t l lead temperature (soldering 10 seconds) +260 c esd esd capability, human body model 5 v esd capability, charged device model 2 notes: 1. stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. 2. all voltage values, except differential volt ages, are given with respect to gnd pin. recommended operating conditions the recommended operating conditions table defines the conditions for actual device operation. recommended operating conditions are specified to ensur e optimal performance to the datasheet specificati ons. fairchild does not recommend exceeding them or designing to absolute maximum ratings. symbol parameter min. max. unit t a operating ambient te mperature -40 125 c
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FLS3217 / fls3247 ? rev. 1.0.0 5 FLS3217 / fls3247 ? single-stage pfc primary-side-regulation offline led driver with integrated power mosfet electrical characteristics unless otherwise specified, v dd =15v and t a =25c. symbol parameter condition min. typ. max. unit mosfet section bv dss drain-source breakdown voltage i d =250a, v gs =0v 700 v r ds(on) static drain-source on resistance FLS3217m i d =0.5a, v gs =10v 13 16 ? FLS3217n 8.8 11.0 ? fls3247n i d =1a, v gs =10v 2.4 2.8 ? c iss input capacitance FLS3217m v gs =0v, v ds =25v, f s =1mhz 175 200 pf FLS3217n 250 pf fls3247n 435 pf c oss output capacitance FLS3217m v gs =0v, v ds =25v, f s =1mhz 23 25 pf FLS3217n 25 pf fls3247n 51 pf v dd section v dd-on turn-on threshold voltage 14.5 16.0 17.5 v v dd-off turn-off threshold voltag e 6.75 7.75 8.75 v i dd-op operating current v s =2.4v, c l =mosfet c iss 2.85 4.00 5.00 ma i dd-st startup current v dd =v dd-on ? 0.16v 2 20 a v ovp v dd over-voltage protection level 22.0 23.5 25.0 v oscillator section f max-cc maximum frequency in cc v dd =10v, 20v 60 65 70 khz f min-cc minimum frequency in cc v dd =10v, 20v 21.0 23.5 26.0 khz vs max-cc vs for maximum frequency in cc frequency=maximum frequency-2khz 2.25 2.35 2.45 v vs min-cc vs for minimum frequency in cc frequency=minimum frequency +1khz 0.55 0.85 1.15 v t on(max) maximum turn-on time 12 14 16 ? s current-sense section v rv reference voltage 2.475 2.500 2.525 v v ccr variation test voltage on cs pin for constant current regulation v cs =0.24v 2.38 2.43 2.48 v t leb leading-edge blanking time 300 ns t min minimum on time in cc v vs =-0.5v, v cs =1.5v 600 ns t pd propagation delay to gate output 50 100 150 ns d saw duty cycle of saw limiter 40 % t dis-bnk t dis blanking time of vs 1.5 ? s i vs-bnk vs current for vs blanking 100 ? a continued on the following page?
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FLS3217 / fls3247 ? rev. 1.0.0 6 FLS3217 / fls3247 ? single-stage pfc primary-side-regulation offline led driver with integrated power mosfet electrical characteristics (continued) unless otherwise specified, v dd =15v and t a =25c. symbol parameter condition min. typ. max. unit current-error-amplifier section ? gm transconductance 85 ? mho ? i comi-sink comi sink current v eai =3v, v comi =5v 25 38 ? a i comi-source comi source current v eai =2v, v comi =0v 25 38 ? a v comi-hgh comi high voltage v eai =2v 4.7 v v comi-low comi low voltage v eai =3v 0.1 v ? over-current protection section v ocp v cs threshold voltage for ocp 0.60 0.67 0.74 v v lowocp v cs threshold voltage for low ocp 0.13 0.18 0.23 v v lowocp-en vs threshold voltage to enable low ocp level 0.40 v v lowocp-dis vs threshold voltage to disable low ocp level 0.60 v over-temperature-protection section ? t otp threshold temperature for otp (3) 140 150 160 o c t otp-hys restart junction temperature hysteresis 10 o c note: 3. when the over-temper ature protection (otp) is ac tivated, the power system enters auto-recovery mode and output is disabled.
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FLS3217 / fls3247 ? rev. 1.0.0 7 FLS3217 / fls3247 ? single-stage pfc primary-side-regulation offline led driver with integrated power mosfet typical performance characteristics 0.5 0.7 0.9 1.1 1.3 1.5 -40 -30 -15 0 25 50 75 85 100 125 FLS3217m FLS3217n fls3247n temp [c] normalized to 25 c temp [c] normalized to 25 c 0.5 0.7 0.9 1.1 1.3 1.5 -40 -30 -15 0 25 50 75 85 100 125 FLS3217m FLS3217n fls3247n temp [c] normalized to 25 c figure 5. v dd-on vs. temperature figure 6. v dd-off vs. temperature 0.5 0.7 0.9 1.1 1.3 1.5 -40 -30 -15 0 25 50 75 85 100 125 FLS3217m FLS3217n fls3247n temp [c] normalized to 25 c temp [c] normalized to 25 c 0.5 0.7 0.9 1.1 1.3 1.5 -40 -30 -15 0 25 50 75 85 100 125 FLS3217m FLS3217n fls3247n temp [c] normalized to 25 c figure 7. i dd-op vs. temperature figure 8. v ovp vs. temperatu r e 0.5 0.7 0.9 1.1 1.3 1.5 -40 -30 -15 0 25 50 75 85 100 125 FLS3217m FLS3217n fls3247n temp [c] normalized to 25 c temp [c] normalized to 25 c 0.5 0.7 0.9 1.1 1.3 1.5 -40 -30 -15 0 25 50 75 85 100 125 FLS3217m FLS3217n fls3247n temp [c] normalized to 25 c figure 9. f max_cc vs. temperature figure 10. f min_cc vs. temperature
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FLS3217 / fls3247 ? rev. 1.0.0 8 FLS3217 / fls3247 ? single-stage pfc primary-side-regulation offline led driver with integrated power mosfet typical performance characteristics (continued) 0.5 0.7 0.9 1.1 1.3 1.5 -40 -30 -15 0 25 50 75 85 100 125 FLS3217m FLS3217n fls3247n temp [c] normalized to 25 c temp [c] normalized to 25 c 0.5 0.7 0.9 1.1 1.3 1.5 -40 -30 -15 0 25 50 75 85 100 125 FLS3217m FLS3217n fls3247n temp [c] normalized to 25 c figure 11. v ccr vs. temperature figure 12. v vvr vs. temperature 0.5 0.7 0.9 1.1 1.3 1.5 -40 -30 -15 0 25 50 75 85 100 125 FLS3217m FLS3217n fls3247n temp [c] normalized to 25 c temp [c] normalized to 25 c 0.5 0.7 0.9 1.1 1.3 1.5 -40 -30 -15 0 25 50 75 85 100 125 FLS3217m FLS3217n fls3247n temp [c] normalized to 25 c figure 13. v ocp vs. temperature figure 14. v ocp_low vs. temperatu r e
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FLS3217 / fls3247 ? rev. 1.0.0 9 FLS3217 / fls3247 ? single-stage pfc primary-side-regulation offline led driver with integrated power mosfet functional description FLS3217 / fls3247 is an ac-dc pwm controller for led lighting applications. truecurrent ? techniques regulate accurate led current independent of input voltage, output voltage, and magnetizing inductance variations. the linear frequency control in the oscillator reduces conduction loss and maintains dcm operation in the wide range of output voltage, which implements high power factor correction in a single-stage flyback topology. a variety of prot ections, such as short/open- led protection, over-temper ature protection, and cycle- by-cycle current limitation stabilize system operation and protect external components. startup powering at startup is slow due to the low feedback-loop bandwidth in the pfc converter. to increase power during startup, the internal oscillator counts 12ms to define startup mode. during startup mode, turn-on time is determined by current-mode control with 0.2v voltage limit. transconductance becomes 14 times bigger, as shown in figure 15. after startup mode, turn-on time is controlled by voltage mode, using the comi voltage. the error amplifier transconductance is reduced to 85mho. 0.2v v cs v comi v in 14gm gm startup mode: 12ms i led time v dd = v dd_on figure 15. startup sequence constant current regulation the output current can be es timated using the peak drain current and inductor current discharge time because output current is sa me as the average of the diode current in steady stat e. the peak value of the drain current is determined by the cs pin and the inductor discharge time (t dis ) is sensed by t dis detector. by using three pieces of information (peak drain current, inductor discharging time, and operating switching period); the truecurrent block calculates estimates the output current. the out put of the truecurrent calculation is compared with an internal precise reference to generate an error voltage, v comi , which determines the turn-on time in voltage-mode control. with fairchild?s innovative te chnique, constant current output can be precis ely controlled. power-factor controller (pfc) and total harmonic distortion (thd) in a conventional boost converter, boundary conduction mode (bcm) is generally used to keep input current in phase with input voltage for power factor (pf) and total harmonic distortion (thd). in flyback / buck boost topology, constant turn-on time and constant frequency i discontinuous conduction mode (dcm) can implement high pf and low thd as shown in figure 16. constant turn-on time is maintained by the internal error amplifier and a large external capacitor (typically over 1f) at the comi pin. constant frequ ency and dcm operation is managed by linear frequency control. i in i in_avg gate constant frequency figure 16. input current and switching linear frequency control dcm should be guaranteed for high power factor in flyback topology. to maintain dcm in the wide range of output voltage, frequency is linearly changed by output voltage in linear frequency c ontrol. output voltage is detected by auxiliary winding and a resistive divider connected to the vs pin, as shown in figure 17. figure 17. linear frequency control when the output voltage decreases, the secondary diode conduction time is increased and the linear frequency control lengthens the switching period. this maintains dcm operation in the wide output voltage range, as shown in figur e 18. the frequency control also lowers primary rms current with better power efficiency in full-load condition.
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FLS3217 / fls3247 ? rev. 1.0.0 10 FLS3217 / fls3247 ? single-stage pfc primary-side-regulation offline led driver with integrated power mosfet l m nv o dis t l m v 4 3 n o dis t 3 4 l m v 5 3 n o dis t 3 5 t t 3 4 t 3 5 v o = v o.nom v o = 75% v o.nom v o = 60% v o.nom primary current secondary current figure 18. primary and secondary current bcm control the end of secondary diode conduction time is possibly over a switching period set by linear frequency control. in this case, FLS3217 and fls3247 don?t allow ccm and the operation mode changes from dcm to bcm. therefore, FLS3217 and fls3247 eliminate sub- harmonic distortion in ccm. short-led protection in the event of a short le d condition, the switching mosfet and secondary diode are usually stressed by the high-power current. however, FLS3217 and fls3247 change ocp level in short-led condition. when v s is lower than 0.4v, the ocp level lowers to 0.2v from 0.7v, as shown in figure 17. power is limited and external component current stress is relieved. leb 1 cs - + v ocp vs 4 at v s < 0.4v, v ocp = 0.2v. at v s > 0.6v, v ocp = 0.7v. figure 19. internal ocp block figure 20 shows operational waveforms at short-led condition. output voltage is quickly lowered to 0v after the led-short event. then the reflected auxiliary voltage is also 0v, making v s less than 0.4v. 0.2v ocp level limits the primary-side current and v dd ?hiccups? up and down in between uvlo hysteresis. v dd_on v dd_off v dd v cs v in led short ! 0.2v figure 20. waveforms at short-led condition open led protection FLS3217 and fls3247 protect external components, such as diode and capacitor, at secondary side in open- led condition. during switch-off, the v dd capacitor is charged up to the auxiliary winding voltage, which is applied as the reflected output voltage. because the v dd voltage has output voltage information, the internal voltage comparator on the vdd pin can trigger output over-voltage protection (ovp), as shown in figure 21. when at least one led is ope n-circuited, output load impedance becomes very high and the output capacitor is quickly charged up to v ovp x ns / na. then switching is shutdown and v dd block goes into ?hiccup mode? until the open-led condition is removed, shown in figure 22. 2 internal bias vdd + - - + v ovp v dd good shutdown gate driver s r q v dd good figure 21. internal ovp block
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FLS3217 / fls3247 ? rev. 1.0.0 11 FLS3217 / fls3247 ? single-stage pfc primary-side-regulation offline led driver with integrated power mosfet figure 22. waveforms at open-led condition under-voltage lockout (uvlo) the turn-on and turn-off thresholds are fixed internally at 16v and 7.5v, respectively. during startup, the vdd capacitor must be charged to 16v through the startup resistor, so that the fls32x7 is enabled. the vdd capacitor supplies vdd until power can be delivered from the auxiliary winding of the main transformer. vdd must not drop below 7.5v during startup. the uvlo hysteresis window ensures that the vdd capacitor is adequate to supply v dd during startup. over-temperature protection (otp) the built-in temperature-sensing circuit shuts down pwm output once the juncti on temperature exceeds 150c. while pwm output is off, vdd gradually drops to the uvlo voltage. some of the internal circuits are shut down and vdd gradually increases again. when vdd reaches 16v, all the internal circuits start operating. if the junction temperature is still higher than 140c, the pwm controller shuts down immediately.
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FLS3217 / fls3247 ? rev.1. 0.0 12 FLS3217 / fls3247 ? single-stage pfc pr imary-side-regulation offline led dri ver with integrated power mosfet physical dimensions front view 8 0 see detail a seating plane gage plane x 45 detail a scale: 2:1 0.25 0.19 0.36 0.50 0.25 r0.10 r0.10 0.90 0.406 (1.04) option a - bevel edge option b - no bevel edge notes: a) this package does not fully conforms to jedec ms-012 variation aa. b) all dimensions are in millimeters. c) dimensions do not include mold flash or burrs. d) drawing filename : m07brev3 land pattern recommendation c 4 7 1 b 5 a 0.65typ 1.75typ 1.27 6.20 5.80 3.81 4.00 3.80 5.00 4.80 (0.33) 1.27 0.51 0.33 0.25 0.10 1.75 max 6 23 0.25 cba pin #1 top view 3.85 7.35 3.81 0.10 c figure 23. 7-lead, soic, depopulated jedec ms-112, .150" narrow body, dual-dap, package drawings are provided as a service to customers consi dering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawi ng and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packagi ng area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ .
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FLS3217 / fls3247 ? rev. 1.0.0 13 FLS3217 / fls3247 ? single-stage pfc primary-side-regulation offline led dr iver with integrated power mosfet physical dimensions 75 4 1 0.33 2.54 7.62 0.56 0.36 1.62 1.42 3.60 3.20 3.60 3.00 6.60 6.20 9.40 9.00 (0.56) 7.62 9.91 7.62 0.35 0.20 notes: unless otherwise specified a) this package complies to jedec ms-001, variation ba, except for b) all dimensions are in millimeters. c) dimensions are exclusive of burrs, mold flash, and tie bar extrusions. d) dimensions and tolerances per asme y14.5m-1994 terminal count (7 rather than 8) e) drawing filename and revision: mkt-na07brev2 5.08 max figure 24. 7-lead, molded dual in-line package, mdip, .300" wide, dual dap package drawings are provided as a service to customers consi dering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawi ng and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packagi ng area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ .
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FLS3217 / fls3247 ? rev. 1.0.0 14 FLS3217 / fls3247 ? single-stage pfc primary-side-regulation offline led dr iver with integrated power mosfet

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